LTC4302IMS-1#TRPBF【PDF 12/20 页】IC BUFFER 2-WIRE BUS 10-MSOP

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LTC4302-1/LTC4302-2

sn430212 430212fs

protocol. After the first Data Byte, the master transmits a

second Data Byte, followed by a Stop Bit. The bits of the

second Data Byte are stored in the LTC4302s Register 2.

Table 3 defines the functions of these control bits. The

first 4 MSBs control the input/output configurations of the

two GPIO pins. The next 2 bits control the enabling/

disabling of the card side and backplane side rise time

accelerators respectively. Since the LTC4302 -2 has only

one GPIO pin, DIR1 and OUT CFG1 control its configu-

ration, and DIR2 and OUT CFG2 are ignored. Figure 4

shows a schematic of the two GPIOs and the register bits

that control their operation. The 2 LSBs are not used in

Write operations.

The LTC4302 can also be written with two bytes using the

SMBus Write Word protocol, as shown in Figure 6. The

LTC4302 treats the first two bytes after the Address Byte

(which the Write Word protocol refers to as Command

Code and Data Byte Low) as the two Data Bytes, and

stores these bytes in Registers 1 and 2 respectively. After

the master transmits the Data Byte High byte, the

LTC4302 acknowledges reception of the byte but ignores

the data contained therein.

OPERATIO

4302 F04

DATA IN1

DIR1

OUT CFG1

GPIO1

DATA IN2

DIR2

OUT CFG2

GPIO2

Figure 4. GPIO Circuits and Their Control Bits

Table 3. Register 2 Definition

BIT

NAME

TYPE

FUNCTION

7 (MSB)

DIR2

Read/Write GPIO2 Mode; 0 = Output, 1 = Input*

DIR1

Read/Write GPIO1 Mode; 0 = Output, 1 = Input

OUT CFG2 Read/Write GPIO2 Output Mode; 0 = Open Drain,

1 = Push-Pull

OUT CFG1 Read/Write GPIO1 Output Mode; 0 = Open Drain,

1 = Push-Pull

OUTACC Read/Write Card Side Rise Time Accelerator

Contol; 0 = Disabled, 1 = Active

INACC Read/Write Backplane Side Rise Time Accelerator

Control; 0 = Disabled, 1 = Active

Read Only Never Used, Always 1

Default State (MSB First): 00000011

OUT CFG1 has no effect when DIR1 = 1; OUT CFG2 has no effect when

DIR2 = 1.

*DIR2 and OUT CFG2 apply only to the LTC4302-1; there is no GPIO2 for

the LTC4302-2, so these bits are meaningless in this case.

START

ACK

11 a4 - a0

d7 - d0

ACK

DATA

BYTE 1

d7 - d0

ACK

DATA

BYTE 2

SLAVE

ADDRESS

STOP

4302 F05

START

ACK

11 a4 - a0

d7 - d0

ACK

COMMAND

CODE

d7 - d0

ACK

DATA

BYTE LOW

SLAVE

ADDRESS

XXXXXXXX

ACK

DATA

BYTE HIGH

STOP

4302 F06

Figure 5. Writing Two Bytes

Figure 6. Writing Two Bytes Using SMBus Write Word Protocol

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